In transaction-type systems there are many times when there is a need to time stamp events to make sure they are processed in the order received for both normal operation and recovery. In a multiple-processor system, each processor may access its local counters (e.g., Intel™ Time Stamp Counter, TSC) to provide this time stamp, and to increase performance by not requiring external access to the system or some single shared resource.
Where there are many requests for such a timestamp, external access can cause degrade in overall performance. In a large system with many processors, it is possible that not all processors are on the same clock source. For example, this is possible if the system interconnect does not require a single clock source.
There are many advantages to this type of system interconnect design, but it may cause a problem if there is drift between the internal timers in the processors. This can become a fatal problem if the timer values appear to have time go backwards when comparing events from different processors. Synchronizing the processors using system software can be difficult and may also affect performance if the drift rate is large enough and the minimum time increment is small.
A solution to these and other problems in prior art computing systems is described hereinbelow.